From: pcw@access.digex.net (Peter Wayner)
Date: Fri, 19 Aug 94 16:22:28 PDT
To: Adam Shostack <adam@bwh.harvard.edu>
Subject: Re: Cray contract info
Message-ID: <199408192321.AA28154@access3.digex.net>
MIME-Version: 1.0
Content-Type: text/plain


ge.
>| 
>|   The PIM chips will be packaged by Cray utilizing its advanced multiple
>| chip module (MCM) packaging technology that allows the CRAY-3 to operate
>| with a record breaking 2.08 nanosecond clock rate. The PIM chips are
>| manufactured by National Semiconductor Corporation. The CRAY-3/SSS is
>| expected to be demonstrated in the first quarter of 1995. After this
>| initial demonstration, interested parties will be invited to try out other
>| applications.


I should note that this is almost 10 times faster than the Coherent Chips. 
Given that there is no need for interprocessor message passing in the 
DES tests, I rate that this chip could be 20 times faster than the 
earlier design. That puts it at 100 days per DES attack. 

This sounds like a pretty fun machine to get. All of the old vector
performance of the Cray bundled with the fun of the old CM-1/CM-2. 
You could get some _great_ results on specific problems. 

-Peter Wayner