1997-07-21 - re: geodesic – FPGAs

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From: Ryan Lackey <rdl@MIT.EDU>
To: cypherpunks@toad.com
Message Hash: ad1cfa5c9cad7a6717166a39c31178fd80ece2a0c2ee9ff6364bc4824ea629cc
Message ID: <9707211446.AA13815@m56-129-19.MIT.EDU>
Reply To: N/A
UTC Datetime: 1997-07-21 15:02:15 UTC
Raw Date: Mon, 21 Jul 1997 23:02:15 +0800

Raw message

From: Ryan Lackey <rdl@MIT.EDU>
Date: Mon, 21 Jul 1997 23:02:15 +0800
To: cypherpunks@toad.com
Subject: re: geodesic -- FPGAs
Message-ID: <9707211446.AA13815@m56-129-19.MIT.EDU>
MIME-Version: 1.0
Content-Type: text/plain



FPGAs lack in dynamic reconfigurability.  However, a friend of mine from
the institute (now graduated and off in california) developed a bloody-fast
reprogrammable chip (I think it can be arbitrarily reprogrammed in a clock
cycle or so).  Needless to say, this is a really wonderful toy -- they
seem to want to use them for "communications processors", like modem
control chips and stuff, but I can think of many more uses for them.  I
think they're talking about being able to ship them in a couple years --
I know I'm going to try to use whatever influence I have to get at least
a development kit.  Think about the potential for iteratively-improved
static designs, if not for truly dynamic designs. (there is some cs
theory in the area of real-time reconfigurable processors, but it's
hard, not all that well explored)  As well, you could always use something
like this in a traditional massively-parallel codebreaking device, perhaps
stepping through keys in silicon rather than in memory.

Very cool toys.  I want one.






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