From: pete@cirrus.com (Pete Carpenter)
Date: Thu, 22 Apr 93 16:46:01 PDT
To: cypherpunks@toad.com
Subject: Re:  Mass producing chips
Message-ID: <9304222251.AA25007@ss2138.cirrus.com>
MIME-Version: 1.0
Content-Type: text/plain




	>tried to get samples, but the price was $300,000 for 10,000 units,

	How are they going to produce them at these prices and in that quantity
	given the "baroque activities in the vault" described by Denning?

	Doug (gumby@wixer.bga.com)

Assuming that there is some EEPROM, or bipolar fuse PROM (like PALs) they can 
easily be programmed during the final (packaged) test stage. After the device 
passes its tests, give it a number. There are already some PALs that have a 
"silicon signature", a lot number embedded on the chip, which allows process 
or lot tracing of devices that don't work up to spec.

Testing on peripheral controllers is well below 5 seconds each (gross ballpark - 
not giving away any secrets here) CPUs may be more, but a "wire-tap" chip 
should be much easier to test than a CPU.  Testers can run close to 24 hours 
a day, and 24*3600/5 is 17,000 chips a day from one test head. QFP trays have 
50 chips/tray, and since the tester knows when the trays are full, it can easily
use this to form lot/tray/batch,etc numbers, as well as individual device numbers.

I don't like what they're doing, but it all sounds technically feasible to me.


Pete Carpenter
IC Design Engineer
Cirrus Logic Inc.

pete@cirrus.com