From: jdd@aiki.demon.co.uk (Jim Dixon)
Date: Fri, 19 Aug 94 05:05:23 PDT
To: ianf@simple.sydney.sgi.com
Subject: Re: NSA Spy Machine and DES
Message-ID: <6682@aiki.demon.co.uk>
MIME-Version: 1.0
Content-Type: text/plain


In message <9408190809.ZM4528@simple.sydney.sgi.com> Ian Farquhar writes:
> Actually, I would be surprised if the "SIMD" processors were not a huge
> array of reprogrammable FPGA's, quite possibly Xilinx's.  The possibilities
> of a large array of these chips, each with local memory, is quite
> interesting.  I have personally seen an array of 64 Xilinx chips in a DEC PeRL
> box doing RSA, at speeds similar or better to almost all available custom
> hardware implementations of the cipher.

The delays in getting data on and off the chip are too large and the amount
of space wasted in redundant functions is too great.  You might prototype
it using FPGAs, but even this is unlikely.  Why not just buy one of the
existing SIMD processors and simulate your target system?

People used to build fast processors out of separate chips (bit slices).
They don't do that any more because it's too slow and too expensive if you
are building in volume.
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