From: "Timothy L. Nali" <tn0s+@andrew.cmu.edu>
Date: Thu, 18 Jan 1996 03:00:37 +0800
To: cypherpunks@toad.com
Subject: Random Number Generators
Message-ID: <0kzHl6200bky0_dkQ0@andrew.cmu.edu>
MIME-Version: 1.0
Content-Type: text/plain


Hi all

	For a class project, I will be designing a VLSI cmos chip to generate
truly random numbers (The chip will be fabricated).  I'm limited to a
2-micron standard cmos technology (no fancy BiCMOS, MISC, or anthing
else).  The most promising design I've seen so far (that I can actually
do) is based on clocking a D flip-flop in the following way:


			         	-----
	8Khz clock ------	| 	|----- Random output
				|	|
				|	|
(sloppy) slow clock	----  |>	|
				|	|
				-----

The slow clock has enough random variation in it's period  for the Dff
to generate random numbers.   The random bits will , of course, have
biases that will need to be corrected with things like Xor gates.


Can anyone give me pointers or references to other types of true random
number generators and to ways of correcting the biases and other
problems in the resulting random bitstream?   I'd also appreciate a
pointer to an intro text (if such a thing exists) on what makes random
numbers good random numbers.  (and before you say it, yes I have Applied
Cyptography.  It's a great book.)

One thing I'm concerned about is making sure the random bitstream is
uniformly random.  What effects, if any, will things like thermal noise,
power comsumption (what if there is a sudden rise in power comsumption
in another part of the circuit), etc. have on the randomness of the
bitstream?  

I'd also appreciate any other suggestions or advice you have on RNGs.

Thanks in advance.