From: Eric Blossom <eb@comsec.com>
Date: Mon, 3 Feb 1997 14:11:20 -0800 (PST)
To: PADGETT@hobbes.orl.mmc.com
Subject: Re: RC5-12/32/5 contest solved
In-Reply-To: <199701302229.OAA19293@toad.com>
Message-ID: <199702032135.NAA17688@comsec.com>
MIME-Version: 1.0
Content-Type: text/plain


A. Padgett Peterson P.E. Information Security apparently wrote:
> Have good reason to believe your estimate for a purpose built machine this
> year (expect 600,000,000 to 1,000,000,000 kps per sieve - these will not 
> be cheap chips but will be commecially available). Expect 400 arrays
> would be required to do DES in a day (average) but is a lot more
> achievable than the 65k postulated by the gang of nine.

I received a nice flyer in the mail the other day from "Chip Express"
(www.chipexpress.com, 800-95-CHIPX). They are offering Laser
Programmed Gate Arrays.  It appears to be a reasonable way to get some
Wiener chips built.  As I recall, the Wiener design required about
23,000 gates.  Their blurb had the following table in in:

  FPGA Gates  ASIC Gates  500 Units  1000 Units  5000 Units
    40,000      20,000      $77        $45         $10
   Not Avail   200,000     $176       $150         $82

So it appears that you can get 5000 Wiener key search chips build for
about $50K.  I'm not sure about the speed, but I wouldn't be surprised
if you could clock these at 50 MHz.  The Wiener design is pipelined
and searches one key per clock, so each chip could search 50e6 keys /
second.  50e6 * 5000 = 250e9 keys / second for $50K

Happy Hunting...

Eric