From: Jyri Poldre <jp@pld.ttu.ee>
Date: Wed, 10 Dec 1997 00:01:35 +0800
To: cypherpunks@Algebra.COM
Subject: A little proffessional advice required
Message-ID: <Pine.SUN.3.91.971209174832.5995A-100000@jep.pld.ttu.ee>
MIME-Version: 1.0
Content-Type: text/plain



Hello everyone.

Some time (Actually some years) ago there was a discussion about
Cryptographic device being devoloped in Estonia. Well now we have some real
results to share. I will include a short description with some questions.

Hope to hear from you all soon.


As a result of scientific research project a team in Tallinn Technical 
University has developed a cryptographic processor.  The first phase of 
the project has been a success. It ended with a prototype and 
presentation 
at NORCHIP'97 conference. Now the team is specifying the tasks for second 
phase of the project. 

If  you  have  some  time to answer to few questions, we would  be 
extremely 
pleased. The data  could help  us to create a real circuit for solving 
real 
problems not just one for satisfying academic curiosity :)  
 
The circuit is a programmable modular  arithmetic  calculator  and IDEA 
block cipher. ALU is 96 bits wide and is shared   between IDEA and 
modular 
calculations. The circuit contains RAM for  storing key exchange data, 
total of 16 registers. Two  of  them are  used   for Internal ALU 
calculations, 2 for storing expanded IDEA keys and one for several 
small 32 bit variables  (cycle  counter, upper parts of expanded IDEA  
keys,  raw  IDEA  keys, & so  on). Currently modular calculations length 
is 
768 Bits. 


We have produced  a test circuit and got the following results:

Technology: 		Atmel ES2 1.0um 2 
			Metal CMOS, standard cell, 50 Kgates
Speed:			20 MHz 
Modular exponent time:	0.1 Sec ( currently 768 Bits )
IDEA speed		20 Mbit/Sec  

All these results are also at:

www.pld.ttu.ee/~prj/norchip.html

Now we are designing a new circuit, what should provide some real 
interest 
to encrypting devices users.

The obvious things to do with the previous circuit are:

Add Second ALU, RAM, redesign datapath and use faster technology for 
Longer modular calculations ( 2*768 bits )
Faster exponent using 2 ALUS in parallel and CRT 
100 Mbit/sec IDEA speed

In pursuit of perfection we must keep in mind the penalty of silicon 
area, 
lower yields, longer devolopment time  and thus higher price.


Question 1:
How much speed would be reasonable enough for both IDEA and modular 
exponent? 

Question 2:
The second  question concerns external interface. What  protocol  if any 
should we include into the circuit? The RS232 strikes as a first 
possible  
solution for smart card applications. Could there be  some other common 
interfaces that we should consider including   into the circuit?


Sincerely,

Tallinn Technical University,
Design and Test laboratory,
IDEXP circuit design team.