From: Jay Adams <jka@ece.cmu.edu>
To: cypherpunks@toad.com
Message Hash: b4e00838a09cc62f356fc23b914c118ffbcbd60f3f39b6c7400500d0df78caf9
Message ID: <9306171547.AA02951@mustang.ece.cmu.edu>
Reply To: <19930616211451.5.TK@ROCKY.AI.MIT.EDU>
UTC Datetime: 1993-06-17 15:48:07 UTC
Raw Date: Thu, 17 Jun 93 08:48:07 PDT
From: Jay Adams <jka@ece.cmu.edu>
Date: Thu, 17 Jun 93 08:48:07 PDT
To: cypherpunks@toad.com
Subject: Re: fast des
In-Reply-To: <19930616211451.5.TK@ROCKY.AI.MIT.EDU>
Message-ID: <9306171547.AA02951@mustang.ece.cmu.edu>
MIME-Version: 1.0
Content-Type: text/plain
> I don't know of any 2.4 gbps DES chips, but DEC has built a 1 gbps
> chip.
> .... Key-loading is a different operation,
> and that might not go nearly as fast. Any hardware assists (i.e., DMA)
> would be for the data, not for the next key to use on the same block of
> data.
>
> Usually the limiting factor is examining the <ostensibly> decrypted data
> for statistically significant patterns indicating that you have the
> correct key. The fast DES chips don't help with this at all. A known
> plaintext attack, of course, doesn't have this problem, but these are
> probably of limited interest in real applications.
If you were interested in cracking DES, I wonder if you couldn't just
build the hardware out of FPGAs. That way, you could make key loading
and the decrypted data test fast as well.
- Jay
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