1996-04-11 - RC4 on FPGAs (Was: Bank transactions on Internet)

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From: iang@cs.berkeley.edu (Ian Goldberg)
To: cypherpunks@toad.com
Message Hash: 34bce1c961d7abf4c786df443cd0d560e51abefc9ce3e3dcc9fb78356f67f247
Message ID: <4kh71n$cl3@abraham.cs.berkeley.edu>
Reply To: <199604091732.KAA29261@netcom9.netcom.com>
UTC Datetime: 1996-04-11 04:48:12 UTC
Raw Date: Thu, 11 Apr 1996 12:48:12 +0800

Raw message

From: iang@cs.berkeley.edu (Ian Goldberg)
Date: Thu, 11 Apr 1996 12:48:12 +0800
To: cypherpunks@toad.com
Subject: RC4 on FPGAs (Was: Bank transactions on Internet)
In-Reply-To: <199604091732.KAA29261@netcom9.netcom.com>
Message-ID: <4kh71n$cl3@abraham.cs.berkeley.edu>
MIME-Version: 1.0
Content-Type: text/plain


Coincidentaly enough, this is part of my project for my Hardware class.
I'll let you know when I have it working.  I'm using Altera FLEX 81188s,
though the 10K models (with built-in RAM) would be _way_ faster...

   - Ian





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